Friday - April 26, 2024

California Inventor Develops NAND Flash Depletion Cell Structure

ALEXANDRIA, Va., Nov. 29 -- Hagop A. Nazarian of San Jose, Calif., has developed a flash depletion cell structure.

According to the abstract released by the U.S. Patent & Trademark Office: "NAND architecture Flash memory strings, memory arrays, and memory devices are described that utilize depletion mode floating gate memory cells. Depletion mode floating gate memory cells allow for increased cell current through lower channel r.sub.ds resistance and decreased "narrow width" effec . . .

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